In general, upper 4 bits of Machine Instruction are assigned to an OP(eration) code and lower 12-bits the Operand which points to a location of the memory. Here we look at "AND [Address]" instruction in detail.

Machine Instruction: 0011 0110 0001 0010
Assembly Instruction: AND [612h]
Description: And G Register bit by bit with the contents of memory at 612(hex)
(and return the ANDed value back to G Register)
The sequence of operations to be performed in Execution Cycle:
Note: A modification (*)-(**) is made to implement our circuits in LogicWorks4.
(*) Remove this signal and move it here (**).

Subcycle	HDL	Note
T7 in Fetch Cycle	E_CYCLE	Set State Flip-Flop to Execute(1)
T0	MAR<-IR[0..11]	copy IR(D0..11) to MAR
T1	Y<-G(*)[, READ_MEM]	copy G to Y(*)[, activate READ_MEM]
T2
T3
T4	(**)[Output/Enable,]X<-MBR	(**)[activate Output/Enable,]copy MBR to X
T5
T6	G<-X AND Y	copy (X AND Y) in ALU to G
T7	F_CYCLE	Reset State Flip-Flop to 0(F_CYCLE)