Introduction to CAPC Processor Project 2004
1. Summary
CAPC Processor
is a 16 bit processor with main memory (RAM) of size 4,096 words, 16 bits per word.
It was designed/built in LogicWorks4 for COMP212 Course (Computer Design and Architecture II)
at Capilano College in the Spring2002 term. The CAPC Processor project (design/build the Processor)
has been the major part of this course.
2. History
The design of the first CAPC processor was based on a standard
Von Neuman machine. I named this particular model Foster machine in honour of Caxton Foster,
University of Massachusetts. His text book on the subject was popular back in the late 1970s and 1980s. His clear,
simple and elegant design of a processor,
machine BLUE, was a joy to study (and teach) in Computer Design and Architecture course.
I first taught the Foster Machine in the Computer Architecture course at Lakehead University,
Thunder Bay, Ontario, Canada. At that time, students had to draw the schematics by hand or some
mechanical drawing device. Then came
an iteractive circuit design software LogicWorks3 in 1996.
Some of the students soon started using LW3 for their 8-bit Processor Design projects.
The Computing Science Department at Capilano College had been using LogicWorks4 for the circuit design in COMP212.
In the 2002Spring term, I designed/built a 16 bit processor a la Foster
by introducing a main control unit in LW4. The processor CAPC was named after our
Capilano College.
Sometimes unexpected behaviour of our circuits and possible memory limitations of PCs in case of
dealing with RAM made the students including myself ran off for
cover blaming the most obvious target - LW4. However, somehow we managed to create a 16 bit working order
CAPC processor. The achievement is also a tribute to the durable nature of LogicWorks4 system. The report is included in the Web reports -
CAPC Processor Presentation 2002. In the 2003Spring term,
I tried to simplify the design and complete the Web text book -
Build your own Processor in LW4.
3. 2004 Spring Term
In the beginning of this term, re-evaluation of the marking scheme, especially,
of the marking algorithm for team projects (such as our CAPC Processor Project) has taken place.
I've decided to make the project approachable for each individual student by making my design as simple as
possible and Web text book easier to follow.
It also means that the machine in LW4 must be interesting and alive from the day one.
By designing/building a skeletal (no meat) processor and making it display numbers incrementally,
I thought, I've created an interesting machine. I was wrong. A few students started to loose interest or
skip the class/lab for various reasons. I tried then to make it more attractive by attaching a generic PROM
and its support, MAR and MBR registers to this machine (rather than introducing other component units).
I called simply this machine Skeletal Processor 2.
It took me a couple of weeks (I was fighting with phantom crackers of my mail system) to realize what this machine was.
(1) The top prize goes to Louis Johannson for his own CAPC processor.
By making use of a Control Bus, he has built an elegant processor.
It was a remarkable class. Good luck to you all.
Since I have been using this machine quite a while and am very fond of it, I hereby assign the name
HASB (Hasegawa Beta) to the skeletal processor 2
(without the Decoder).
It is by no means a claim to this simple machine. It has been designed/built/used by
many processor designers in some other forms if not the same. (Added Nov08,2007
Click here: Tanenbaum's Machine MAC1 )
It is rather a reward to a marathon runner who crossed
the 1 KM line. And I am very proud of my student, Tom Bebler, who recognized the true nature
of the machine at some point in this term.
(2) The second prize goes to Mark Rossen who created an Assembler
(in Perl) for CAPC processor. I will try to use it in the Spring2005 term.
(3) A special prize goes to Martin Fietkiewicz who wrote an interesting
CAPC Project Report.
(4) Each of you, Michael Chan, Neal Clark, Alix Cote, Shayan Kayhanian,
Hans Lee, Miyu Nakagawa , who successfully completed the CAPC Project
should be given a medal.
May 10, 2004
Dr. Minoru Hasegawa
Department of Computing Science
Capilano College
North Vancouver, BC, Canada
